HPC is entering a post-Exascale era marked by heterogeneous hardware (accelerators, disaggregated memory, quantum units) and increasingly dynamic, data‑intensive, AI‑driven workloads. Current fragmented software stacks (MPI, OpenMP, CUDA) limit portability, adaptivity, and performance. The talk will outline a strategy and first steps towards a co‑designed compiler–runtime–AI ecosystem, with HPX as the integration foundation, to close the optimization loop between static analysis and runtime feedback and to deliver performant, resource‑efficient, adaptive, and portable execution for next‑generation HPC.
We instrument compiler analyses with runtime‑visible metadata via LLVM/Clang extensions and an HPX MLIR dialect, enabling executors and schedulers to query detailed task characteristics. The compiler emits multiple kernel variants (scheduling, layouts, vectorization, communication patterns) stored in a VariantRegistry; the runtime selects and refines variants using current system state and light‑weight ML models. An embedded JIT service supports dynamic specialization triggered by runtime telemetry; compiled variants are cached and distributable across nodes. Compiler‑assisted memory management (layout descriptors, arena allocation, prefetch annotations) and communication annotations (message counts, latency sensitivity) allow the runtime to perform NUMA‑aware placement, predictive scheduling, buffer preallocation, and adaptive protocol selection (MPI/UCX/libfabric) for critical transfers.
AI augments this stack by combining static features (loop depth, dependence structure) with dynamic counters (memory pressure, network state) to train offline models (gradient‑boosted trees, compact neural nets, and RL agents) and deploy microsecond‑scale inference for frequent scheduling and placement decisions. Applied to irregular, dynamic workloads (graph analytics, adaptive mesh refinement, particle methods, sparse solvers), the integrated stack enables adaptive data‑layout switching (AoS/SoA/CSR variants), multi‑variant kernel selection with JIT refinement, proactive load redistribution, and communication batching and consistency tuning. Preliminary projections indicate substantial reductions in critical‑path latency and end‑to‑end performance improvements (single‑digit to mid‑double‑digit percent gains) and energy savings versus static policies.
By leveraging HPX’s standards‑aligned C++ model, fine‑grained async tasks, global address space, rich telemetry, and extensible executors, this compiler‑runtime co‑design provides a practical blueprint for a unified programming model spanning CPUs, GPUs, accelerators, and distributed nodes. We invite collaboration to implement prototypes, build benchmark suites, and engage the community to validate and evolve this integrated stack for post‑Exascale and AI‑centric HPC systems.
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Hartmut is a professor at Louisiana State University. He is probably best known for his involvement in open-source software projects, such as being the author of several C++ libraries he has contributed to Boost that are in use by thousands of developers worldwide. In his current research he focusses on leading the [STE||AR Group](https://stellar-group.org/) at LSU’s Center for Computation and Technology working on the practical design and implementation of future execution models and programming methods using the [HPX runtime system](https://github.com/STEllAR-GROUP/hpx) - a modern C++ library for concurrency and parallelism. His research interests are focused on the complex interaction of compiler technologies, runtime systems, active libraries, and modern system’s architectures. His goal is to enable the creation of a new generation of scientific applications in powerful, though complex environments, such as high-performance computing, distributed and cloud computing, spatial information systems, and compiler technologies.