Before you can break the rules, you have to know them.
The C++ Standard gives us a beautiful, mathematically rigorous model of concurrency. We are taught that data races are undefined behavior, that atomic operations are indivisible, and that memory barriers stop the compiler and CPU from making a mockery of our logic. We are taught the hierarchy of progress guarantees—how lock-free and wait-free algorithms banish deadlocks, priority inversion, and convoying. By the textbook, lock-free is the obvious tool for high-performance concurrent code.
This morning's talk is the textbook.
This afternoon's talk—"Lock-free programming is dead. Long live lock-free programming!"—is what happens when modern hardware reads the textbook and laughs. To follow that argument, you need the baseline cold. That is what we will build here.
We will start with the distinction that quietly ruins half of all "parallel" code: concurrency vs. parallelism. We will then dig into the C++ memory model and see exactly why your code gets reordered, and how acquire, release, and seq_cst give you the precision to enforce order without overpaying for it. We will dissect std::atomic<T>—what it does, what silently is not (x = x + 1 is not atomic; ++x is), and the mechanics of Compare-And-Swap, including the strong/weak distinction that x86 lets you ignore and ARM emphatically does not. Along the way, we will see how alignment and std::atomic_ref decide whether you get a real hardware atomic or a hidden spinlock the compiler quietly inserts on your behalf. And we will close by connecting the C++ syntax to the silicon underneath—store buffers, out-of-order execution, and the cache coherence machinery that makes all of this work, or appear to.
acquire
release
seq_cst
std::atomic<T>
x = x + 1
++x
std::atomic_ref
This session stands on its own as a rigorous, practical guide to writing correct concurrent C++. But it is also the foundation for the afternoon. Come this morning to learn how concurrent software is supposed to work. Come this afternoon to watch it collide with the silicon.
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Fedor G. Pikus is a Technical Fellow and the Director of the Advanced Projects Team at Siemens Digital Industries Software. His responsibilities include planning the long-term technical direction of Calibre products, directing and training the engineering teams, overseeing the design and architecture of the software, and researching new design and software technologies.
His earlier positions included Chief Scientist at Mentor Graphics (acquired by Siemens Software), Senior Software Engineer at Google, and Chief Software Architect for Calibre PERC, LVS, and DFM. He joined Mentor Graphics in 1998, making the switch from academic research in computational physics to the software industry.
Fedor is a recognized expert in high-performance computing and C++. He is an O'Reilly author and has written three books on C++ and software design. He is a regular instructor at the CppCon Academy, leading two of the best-attended classes, and has presented his work at CppNow, CppCon, CppNorth, SD West, DesignCon, and in various software development journals. Fedor holds over 30 patents and has authored over 100 papers and conference presentations on physics, EDA, software design, and the C++ language.