I’m a Senior Software Engineer at Bloomberg, specializing in low‑latency, cache‑optimized C++ systems for trading and real‑time environments. I have been in the software development industry for 6 years now.
I’m deeply interested in how algorithms behave in the real world—across CPU caches, branch predictors, and memory hierarchies—and I enjoy sharing insights that connect theoretical expectations with actual performance. Outside of work, I spend time on robotics, embedded systems, and building end‑to‑end C++ control stacks.
Many C++ developers assume that atomics are always faster than mutexes. After all, atomics map directly to hardware instructions, while mutexes may involve OS‑level locking and kernel transitions. But real‑world benchmarks across different CPU architectures tell a more nuanced story. This talk explores cases where atomics are slower than mutexes, particularly on ARM architectures such as Apple Silicon. The root cause lies in how C++’s memory model interacts with hardware memory models: x86’s strong ordering makes atomic operations relatively cheap, while ARM’s weaker ordering requires additional barriers that introduce measurable overhead. Combined with OS scheduling behavior, these differences can invert […]